Parallel to serial data converter

Details Parallel to serial data converter Parallel to serial data converter

1997-04-29

1998-08-25

Young, Brian K.

Coded data generation or conversion

Digital code to digital code converters

Parallel to serial

375360, 341100, H03M 900

Patent

active

057987203

ABSTRACT:
The invention provides a parallel to serial data converter wherein the frequency of a basic clock pulse signal to be applied for driving can be reduced to one half with respect to a same data rate and consequently the operation speed required for a circuit in a preceding stage can be reduced, and a bad influence of noise such as, for example, jitters of serial data is eliminated. In the parallel to serial data converter, a clock pulse signal having a frequency f/2 Hz equal to one half the data rate of parallel data which is f bps is used as a basic clock pulse signal, and an inverted pulse signal is produced from the basic clock pulse signal. Then, a rising or falling edge of each pulse of the basic clock pulse signal and a rising or falling edge of each pulse of the inverted pulse signal are detected, and a byte clock pulse signal having a frequency equal to that of the parallel data is produced by logical ORing of such two edge detection outputs and is supplied to a multiplexer.

REFERENCES:
patent: 4752942 (1988-06-01), Iwakami
patent: 5012240 (1991-04-01), Takahashi et al.
patent: 5548285 (1996-08-01), Ford et al.
patent: 5548622 (1996-08-01), Ma
patent: 5563594 (1996-10-01), Ford et al.
patent: 5627828 (1997-05-01), Lee
patent: 5714904 (1998-02-01), Jeong

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