Parallel-to-serial converter

Coded data generation or conversion – Digital code to digital code converters – Parallel to serial

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H03M 900

Patent

active

053193695

ABSTRACT:
Typically, a parallel-to-serial converter comprises a parallel-to-parallel register and a parallel-to-serial register. According to the prior art, a first clock signal the transfer of incoming parallel data words to outputs of the parallel-to-parallel register whereas the loading of the parallel-to-parallel register is rhythmed by a second clock signal which is independent of the first clock signal. According to the invention, a local base time produces the second loading clock signal and two clock signals substantially in phase-opposition so that there is time dependence between these signals. A phase analyzing circuit derives a control signal for selecting one of the two clock signals which are in phase-opposition as a function of a phase shift between the incoming parallel data words and the first clock signal.

REFERENCES:
patent: 3631464 (1971-12-01), Dahlberg
patent: 4218758 (1978-06-01), Allen et al.
patent: 5107264 (1992-04-01), Novof

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