Excavating
Patent
1998-02-24
1999-07-13
Tu, Trinh L.
Excavating
371 201, 371 671, 370905, H03M 1300, G01R 3128, H04L 1228
Patent
active
059236817
ABSTRACT:
An error correction circuit for an ATM header of an ATM cell uses a sequence of synchronous comparator circuits to generate a correction mask. The sequence of comparators, when used in a processor having a 32-bit bus, provide for near minimum processing delay at an ATM node. The error correction circuit also provides error status flags for an ATM cell processor, allowing for the processor to discard ATM cells with multiple errors.
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Garvin, Jr. John C.
Gray Francis I.
Tektronix Inc.
Tu Trinh L.
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