Parallel-serial multiplier and accumulator

Details Parallel-serial multiplier and accumulator Parallel-serial multiplier and accumulator

1998-09-03

2000-03-07

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708632, 708523, G06F 752, G06F 738

Patent

active

060353198

ABSTRACT:
An improved parallel-serial multiplier and accumulator for multiplying a digital multiplicand and a multiplier resulting in a product that is added to an accumulator input. The parallel-serial multiplier and accumulator includes a parallel-serial multiplier and a digit serial adder. The parallel-serial multiplier includes a recoder for receiving the digital multiplier and outputting an ordered sequence of recoded words, a partial product generator for generating partial products that are dependent upon the digital multiplicand and upon each of the ordered sequence of recoded words, and an adder for adding the partial products to provide the product. The adder outputs a digit serial word that contains the least significant bits of an intermediate sum of the partial products as the partial products are being added. The digit serial adder includes a carry save adder that receives the product and the accumulator input to produce the output sum.

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Chin-Liang Wang, "Bit-Serial VLSI Implementation of Delayed LMS Adaptive FIR Filters," IEEE Transactions on Signal Processing, vol. 42, No. 8, Aug. 1994, 2169-2175.

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