Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1992-03-30
1994-08-09
Evans, Arthur G.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358448, 345197, 36518912, G06F 1520
Patent
active
053374096
ABSTRACT:
32-bit image data transferred through an image data bus is input to a thinning out circuit through a bus I/F, and is thinned out by the thinning out circuit to have an active data width of 24 bits. The 32-bit data including the active data width of 24 bits obtained by the thinning out operation is supplied to a line buffer block. The line buffer block has a data width equal to or larger than the maximum bit width of the image data bus. The 32-bit data supplied to the line buffer block is directly written in the line buffer block. The data written in the line buffer block is repetitively shifted by a shift register block according to the active data width of 24 bits.
REFERENCES:
patent: 4532557 (1985-07-01), Larkins
patent: 4809216 (1989-02-01), Lai
patent: 4972500 (1990-11-01), Ishii et al.
patent: 5148294 (1992-09-01), Kurogane et al.
patent: 5157773 (1992-10-01), Matsumoto et al.
Evans Arthur G.
Kabushiki Kaisha Toshiba
Tung Kee M.
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