Parallel-serial converter

Coded data generation or conversion – Digital code to digital code converters – Parallel to serial

Reexamination Certificate

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Details

C341S100000

Reexamination Certificate

active

11089034

ABSTRACT:
The invention relates to a parallel-serial converter for converting parallel data into serial data, in particular for or in a DDR semiconductor memory, having at least n input terminals at which n data signals are present in parallel, an output terminal for outputting a serial data signal, a controllable latch connected to the input terminals on the input side, a common storage node, which is connected to outputs of the latch and which holds a data signal of the controllable latch present last, a controllable bypass device, which has an input, which is coupled to the storage node on the output side and which has a control terminal, via which a predeterminable state present at the input of the bypass device can be switched onto the storage node. The invention furthermore relates to a semiconductor memory having such a parallel-serial converter and to a method for operating such a parallel-serial converter.

REFERENCES:
patent: 5247652 (1993-09-01), Uda
patent: 5612695 (1997-03-01), Ueda
patent: 5612696 (1997-03-01), Kim
patent: 5654707 (1997-08-01), Matsumoto
patent: 5982309 (1999-11-01), Xi et al.
patent: 6970117 (2005-11-01), Lui et al.
patent: 7091890 (2006-08-01), Sasaki et al.
patent: 2002/0057614 (2002-05-01), Kanazashi
patent: 2006/0192701 (2006-08-01), Kobayashi
German Office Action dated Dec. 14, 2004, issued in counterpart foreign application.

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