Boots – shoes – and leggings
Patent
1994-08-01
1997-06-10
Bowler, Alyssa H.
Boots, shoes, and leggings
39520002, 39520012, 3952001, 395800, 364DIG1, G06F 1300
Patent
active
056385161
ABSTRACT:
A parallel processor network comprised of a plurality of nodes, each node including a processor containing a number of I/O ports, and a local memory. A communication path is established through a node by comparing a target node address in a first address packet with a processor ID of the node. If node address is equal to the target node address a receive channel is allocated to the input port and a route ready command is sent over an output port paired with the input port. If the node address is not equal to the target node address, then a first unallocated output port is selected from a port vector and the address packet is forwarded to a next node over the selected output port.
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Duzett Robert C.
Kenoyer Stanley P.
Bowler Alyssa H.
Lamb Owen L.
nCUBE Corporation
Nguyen Dzung C.
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