Electrical computers and digital processing systems: multicomput – Distributed data processing
Reexamination Certificate
2008-08-25
2010-06-01
Wang, Liangche A (Department: 2453)
Electrical computers and digital processing systems: multicomput
Distributed data processing
C709S206000, C709S217000, C709S218000, C718S108000, C706S010000
Reexamination Certificate
active
07730121
ABSTRACT:
Methods and systems for parallel computation of an algorithm using a plurality of nodes configured as a Howard Cascade. A home node of a Howard Cascade receives a request from a host system to compute an algorithm identified in the request. The request is distributed to processing nodes of the Howard Cascade in a time sequence order in a manner to minimize the time to so expand the Howard Cascade. The participating nodes then perform the designated portion of the algorithm in parallel. Partial results from each node are agglomerated upstream to higher nodes of the structure and then returned to the host system. The nodes each include a library of stored algorithms accompanied by data template information defining partitioning of the data used in the algorithm among the number of participating nodes.
REFERENCES:
patent: 5166674 (1992-11-01), Baum et al.
patent: 5224100 (1993-06-01), Lee et al.
patent: 5325526 (1994-06-01), Cameron et al.
patent: 5349682 (1994-09-01), Rosenberry
patent: 5371852 (1994-12-01), Attanasio et al.
patent: 5488609 (1996-01-01), Hluchyj et al.
patent: 5689722 (1997-11-01), Swarztrauber
patent: 5699500 (1997-12-01), Dasgupta
patent: 5758144 (1998-05-01), Eberhard et al.
patent: 5838906 (1998-11-01), Doyle et al.
patent: 5857076 (1999-01-01), Schmidt
patent: 5860010 (1999-01-01), Attal
patent: 5905736 (1999-05-01), Ronen et al.
patent: 6014669 (2000-01-01), Slaughter et al.
patent: 6117180 (2000-09-01), Dave et al.
patent: 6154765 (2000-11-01), Hart
patent: 6163855 (2000-12-01), Shrivastava et al.
patent: 6167428 (2000-12-01), Ellis
patent: 6295573 (2001-09-01), Bailey et al.
patent: 2001/0011294 (2001-08-01), Ellis, III
patent: 2003/0135614 (2003-07-01), Hattori et al.
patent: 0107453 (1984-05-01), None
patent: 0640930 (1995-05-01), None
patent: 0921485 (1999-06-01), None
patent: 1031923 (2000-08-01), None
patent: 1096378 (2001-05-01), None
patent: 9427216 (1994-11-01), None
patent: 9919807 (1999-04-01), None
patent: 0101219 (2001-01-01), None
Thibodeaux, “Organizers Hope To Give Lafayatte Superstart In High-Tech Direction”, Oct. 1927, Supercomputeronline.com, 2 pages.
IBM, “Cluster-Based Stack Optimization Algorithm for Very Large-scale Integration”, Sep. 1987, IBM Technical disclosure Bulletin, vol. 30, Issue 4, p. No. 1445-1447 (4).
Chong et al, “Concurrent Processing for Picture Archiving and Comunication system (PACS)”, Jun. 1995, IEEE, p. No. 468-472.
Antaki et al, “The soft side of New Enterprise”, May 1999, MIT enterprise FORUM of Dallus Network Inc., 2 pages.
Hitachi, “The Next Generation of Information Technology”, spring 97, Hitachi today No. 39, p. No. 1-6 and cover page.
Kahaner, “Fujitsu's 2.sup.nd Parallel computing WS (PCW'93) Nov. 1993 Kawasaki Japan” Dec. 1993, 15 pages.
Ryan et al, “A Scalable Distributed Multimedia Knowledge Retrieval System on a cluster of Heterogeneous High Performance Architectures”, International Journal on artificial intelligence tools, vol. 9, No. 3 (2000) p. No. 343-367.
(Author unknown), “CAD comes on line”, Feb. 21, 2000, p. s-28, Design News-Automotive.
Danny Hillis, “Massive, Parallel Supercomputers—Where they're Going—How They'll Work”, Forbes ASAP, Feb. 22, 1999, pp. 60-62 and 64.
Internet Information article: “MSC.Software Announces visualNastran 4d2Go; A total Engineering Solution to be Bundled with CAD Products”, Mar. 6, 2000.
Cohen, Ed et al. Efficient Covexity and Domination Algorithms for Fine-and Medium-Grain Hybercube Computers, Algoithmica, vol. 7, pp. 51-75, Springer Vertag New York, Inc., 1992.
Benedicts, E.P., “Multiprocessor architectures are converging”, Hypercube Concurrent Computers and Applications: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues, vol. 1, pp. 12-20, Pasadena, California, Jan. 19-20, 1988.
Livingston, Marilyn L. and Stout, Quentin F., “Fault Tolerance of the Cyclic Buddy Subcube Location Sceme in Hypercubes”, Proceedings of the 6th Distributed Memory Computing Conference (1991), IEEE, pp. 34-41, 1991.
Fox, G.C., “What have we learnt from using real parallel machines on real problems?”, Hypercube Concurrent Computers and Applications: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues, vol. 2, pp. 897-955, Pasadena, California, Jan. 19-20, 1988.
“Topologies—computational messaging for multicomputers”, Hypercube Concurrent Computers and Applications: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues, vol. 1, pp. 580-593, Pasadena, California, Jan. 19-20, 1988.
Keagle, C., et al.: “Categorization and performance analysis of advanced avionics algorithms on parallel processing architectures” IEE, May 22, 1989, pp. 1722-1724.
Trystram D: “Scheduling parallel applications using malleable tasks on clusters” Parallel And Distributed Processing Syposium., Proceedings 15th International San Francisco, CA, USA Apr. 23-27, 2001, Los Alamitos, CA USA, IEE Comput. Soc, 2128-2135.
Min-Bin Chen, et al.: “Parallel 2d delaunay triangulations in hpf and mpi” Parallel And Distributed Processing Symposium, Proceeding 15th International San Francisco, CA, USA Apr. 23-27, 2001, Los Alamitos, CA, USA, IEEE Comput. Soc, 301-308.
Fernandez, E.B., et al: “Fault-tolerant parallel algorithms” Proceedings of Southeaston. Williamsburg, Spril 7-10 1991, Proceedings Of The Southeast Conference, New York, IEEE, US vol. 1, Apr. 7, 1991, pp. 466-469.
Xiaoxiong, Zhong, et al.: “Optimal implantation of parallel divide-and-conquer algooriths on de Bruijn networks” Frontiers Of assively Parallel Computatioh, 1992., Fourth Symposium On The McLean, VA, USA Oct. 19-21, 1992, Los Alamitos, CA, USA, IEEE Comput. Soc, US Oct. 19, 1992, pp. 583-585.
Welch, L.R., et al.: “Metrics and techniques for automatic partitioning and assignment of object-based concurrent programs” Parallel And Distributed Processing, 1995. Proceedings. Seventh IEEE Symposium On San Antonio, TX, USA Oct. 25-28, 1995, Los Alamitos,CA, USA, IEEE Comput. Soc, US, Oct. 25, 1995, pp. 440-447.
Kwan, A.W., et al.: “Using parallel programming paradigms for structuing programs on distributed memory computers” IEE, Apr. 28, 1991, pp. 210-213.
Grundy, J: “Software architecture modelling, analysis an dimplementation with softarch” Proc 34th Hawaii International Conference On System Sciences, Jan. 3, 2001, pp. 3825-3834.
Pontelli, E., et al: “Automatic compile-time parallelization of prolog programs for dependent and-parallelism” Proc. Of the Fourteenth International Conference On Logic Programming, [online] Jul. 1997, pp. 108-122, Retrieved From The Internet URL:http://citeseer.ist.psu.edu/cacxhe/papers/cs/16510/http:zSzzSzwww.cs.nmsu.eduzSzguptazSzacezSzstaticdap.pdf/pontelli97automatic.pdf> [retrieved Sep. 1, 2004].
Coddington, P.D., et al: “Web-based access to distributed high-performance geographic information systems for decision support” Proceedings Of The Hawaii International Conference On System Sciences, XX, XX, Jan. 5, 1999, pp. 1-12.
“Method Sending Object Agent And Receiving Object Agent” IBM Technical Disclosure Bulletin, IBM Corp. New York, US, vol. 39, No. 12, Dec. 1 2996, p. 43.
Cameron, I, et al.: “BT Webworld TM-WEB Hosting For Every business Need” British Telecommunications Engineering, British Telecommunications Engineering, London, GB, vol. 16, No. 4, 1998, pp. 273-278.
Saletore, V.A., et al.: “Parallel Computations On The CHARM Heterogeneous Workstation Cluster” High Performance Distributed Computing, 1994, Proceedings Of the Third IEEE Internation
Chang Silva
Howard Kevin David
Rea Glen Curtis
Robertson Nick Wade
Lathrop & Gage LLP
Massively Parallel Technologies, Inc.
Wang Liangche A
LandOfFree
Parallel processing systems and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Parallel processing systems and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel processing systems and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4238177