Patent
1995-05-15
1998-09-08
Kriess, Kevin A.
G06F 945
Patent
active
058058907
ABSTRACT:
A debugger for use in connection with a parallel computer including a plurality of processing nodes. The debugger enables the operator to establish a processing node set in response to certain criteria, such as the respective identifications of the processing node and their prior processing under the debugger. The debugger, in response to a processing node set establishment command from the operator, enables each processing node to establish and condition a set membership flag in response to the operator-supplied set membership criteria. The debugger is then responsive to a debugging command from the operator to enable the processing nodes to use their respective set membership flags to condition their execution of the debugging command.
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Jourdenais Karen C.
Simons Joshua E.
Sistare Steven J.
Corcoran, III Peter J.
Jordan Richard A.
Kriess Kevin A.
Sun Microsystems Inc.
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