Parallel-processing error correction system

Details Parallel-processing error correction system Parallel-processing error correction system

1977-01-04

1978-08-08

Atkinson, Charles E.

Communications: electrical

Digital comparator systems

3401461BE, G06F 1112

Patent

active

041059999

ABSTRACT:
A parallel-processing error correction system for digital data transmission employing a code-polynomial division circuit having a serial-type shift register for a cyclic code. Provided with null input lines, one for each data input line, a set of switches for selection between the data and null input lines, and another set of switches associated with buffer registers for series connection therebetween, the device can be readily adapted for any change in number of parallel input bits by switch operation.

REFERENCES:
patent: 3452328 (1969-06-01), Hsiao et al.
patent: 3465287 (1969-09-01), Kennedy et al.
patent: 3601800 (1969-09-01), Lee
patent: 3622985 (1971-11-01), Ayling et al.
patent: 3703705 (1970-12-01), Patel
Boudreau et al., Parallel CRC Generation for Multilength Characters, IBM Technical Disclosure Bulletin, vol. 15, No. 4, Sep. 1972, pp. 1314-1315.

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