Patent
1996-02-26
1997-09-02
Donaghue, Larry D.
395379, 395381, G06F 1500
Patent
active
056642148
ABSTRACT:
An apparatus and a method for combining the characteristics of both single instruction, multiple data stream (SIMD) and multiple instruction, multiple data stream (MIMD) computer architectures into a single parallel processing computer for performing multiple instruction stream processing. Such a parallel processing computer simultaneously performs both MIMD and SIMD operations on various processors within the computer. Additionally, at specified points during program execution, certain processors, i.e., a subset of all the processors, are synchronized. Once synchronized, the processors can exchange data. Moreover, the processors that do not take part in the synchronization continue executing instructions without interruption. The apparatus and method disclosed find applicability in video servers, medical imaging, special effects and animation and location based entertainment systems among other applications.
REFERENCES:
patent: 4344134 (1982-08-01), Barnes
patent: 4412286 (1983-10-01), O'Dowd
patent: 4414624 (1983-11-01), Summer
patent: 4837676 (1989-06-01), Rosman
patent: 5129077 (1992-07-01), Hillis
patent: 5175865 (1992-12-01), Hillis
patent: 5197140 (1993-03-01), Balmer
patent: 5390260 (1995-02-01), Bezek
Schweberski et al. "A Model of Task Migration in Partitionable Parallel Processing System".
International Conference on Application Specific Array Processors, 1992, Knight et al., "The Sarnoff Engine: A Massively Parallel Computer for High Definition System Simulation", pp. 342-356, especially pp. 346-355.
Computer, Feb. 1992, Siegel et al., "Mapping Computer-Vision-Related Tasks Onto Reconfigurable Parallel-Processing System", pp. 54-63.
Bronson et al. "Experimental Application-Driven Architecture Analysis of SIMD/MIMD Parallel Processing System" IEEE, 1990.
Bridges, "The GPA Machine: A Generally Partitionable MSIMD Architecture", pp. 196-203, IEEE (1990).
Giloi, "The Suprenum Architecture", Conference Papers: Plenary Sessions and Stream A, Conpar 88, British Computer Society (1988).
Chin Danny
Peters, Jr. Joseph Edward
Taylor Herbert Hudson
Burke William J.
David Sarnoff Research Center Inc.
Donaghue Larry D.
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