Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Patent
1993-12-21
1996-01-30
Chin, Stephen
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
375362, H04L 700
Patent
active
054886392
ABSTRACT:
A method and apparatus for synchronizing an asynchronous signal to a clock signal. The apparatus includes an enable generator, first, second and third sampling circuits, a selecting circuit, and can include a latching circuit. The enable generator is coupled to the first sampling circuit by a first enable line, to the second sampling circuit by a second enable line, and to the third sampling circuit by a third enable line. The first, second, and third sampling circuits are coupled to receive the asynchronous signal. The selecting circuit is coupled to receive the output signals of the first, second and third sampling circuits. For the first sampling circuit, the following steps are performed: sampling the asynchronous signal, generating an output signal for the sampling circuit, waiting a period of time, and selecting the sampling circuit's output signal. These steps are also performed for the second sampling circuit and the third sampling circuit.
REFERENCES:
patent: 4191849 (1980-03-01), Vrba
patent: 4573173 (1986-02-01), Yoshida
patent: 4616211 (1986-10-01), Ross et al.
patent: 5022056 (1991-06-01), Henderson et al.
patent: 5272729 (1993-12-01), Bechade et al.
Avni Dror
Baransy Anan
Farrell Robert L.
Liebermensch Avi
MacWilliams Peter D.
Chin Stephen
Intel Corporation
Vo Don N.
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