Pulse or digital communications – Spread spectrum
Reexamination Certificate
1998-12-29
2001-02-13
Pham, Chi H. (Department: 2731)
Pulse or digital communications
Spread spectrum
C375S142000, C708S252000
Reexamination Certificate
active
06188714
ABSTRACT:
BACKGROUND OF THE INVENTION
The newest wave of technology to hit telecommunications is that which is behind personal communications systems (PCS). A number of PCS architectures have emerged in recent years to meet the increasing demands for mobile and personal portable communications. One architecture that seems to offer the most relief from overcrowding in the airwaves is Code Division Multiple Access (CDMA), also known as “spread spectrum.” CDMA systems can offer up to twenty times more call-handling capacity than the conventional cellular systems by assigning a special electronic code to each call signal, allowing more calls to occupy the same space and be spread over an entire frequency band. Spread spectrum communication technology has been in use by the military for over half a century, primarily to overcome jamming and to protect the signal from eavesdropping. In the commercial realm, spread spectrum digital technology has achieved a much higher bandwidth efficiency for a given wireless spectrum allocation, and hence serves a far larger population of multiple access users than analog or other digital technologies.
CDMA works by combing each phone call with a code which only one cellular phone can extract from the air waves. It operates by spreading all signals across the same broad frequency spectrum and assigning a unique code to each signal. Therefore, many mobile units can be transmitting over the same frequency and at the same time. The dispersed signals are pulled out of the background noise by a receiver associated with the code. Each receiver will determine which signal is addressed to it by checking the code assigned. The receiver must also be “smart” enough to analyze a captured signal, despread the signal, and identify which signal should be reconstituted.
The spreading of the signal at the transmitter is accomplished by means of a code which is independent of the data. Direct Sequence is one of the best known spread spectrum techniques. Using Direct Sequence, the digital signal is multiplied by a pseudo-random noise code (PN-code) which exhibits properties similar to true Gaussian noise. This results in low cross-correlation values among the various coded signals used in the frequency spectrum and hence, the more difficult it is to jam the signal or to detect a data message using the code. (Cross-correlation can be described as the comparison of two sequences to see how similar they are to one another at different phases.) Several families of binary PN-codes exist, but the usual way to create a PN-code is relatively simple, in that a number of shift registers is all that is required. Another observation is that the despread operation at the receiver is the same as the spread operation at the transmitter. In the receiver, the received signal is multiplied again by the same (synchronized) PN-code. Since the code consists of +1's and −1's (or perhaps 0's and 1's) this operation completely removes the code from the signal by cancellation, and the original data signal is left intact.
A common PN-code sequence is a maximal length (“long bit”) sequence, or M-sequence. Much use is made of M-sequences in digital wireless communication. Some practical M-sequences having lengths as short as 11 bits or as long as 2
89
−1 or longer, have been employed for PN-code generation purposes, at code rates from under a bit per second to over several hundred megabits per second. In a practical CDMA application, it is often required to start M-sequences at an arbitrary value (phase of the code). One approach for this implementation is to obtain the corresponding initial register values to start the code generation. The initial register value is defined by a seed register value and the phase of the generated code. The seed value is usually found by reading special information transmitted from the base station of the cellular phone. The phase of the code is used to protect the security of user information to be transmitted over the wireless channel, and is individually defined for each hand-held terminal (handset). When the handset is activated, it needs to synchronize its code to the base station code. However, since the base station code is being continuously shifted, synchronizing the phone with the base station poses a difficult design consideration. First, the handset circuitry determines how much time its code lags or advances the base station code. It then either calculates the register value (this part is not easily done when the register size is long) with the phase difference between the base station and handset correctly adjusted, or if the phase difference is small, advances the output code by shifting the register by the required number of clocks. However, the calculation approach is not practical when the phase difference is small, since it can be much easier and faster to shift the seed register value than to execute complex computations to derive the seed register value mathematically. In practice, an arbitrary phase position can be obtained by preparing a number of representative code seed values and shifting the set register by the remainder clock counts. For this purpose, the shift register needs to be clocked at high speed to minimize the phase adjustment time, the time to lock on to the incoming signal. This operation increases the power consumption of the code generator, and is not favorable for mobile communication equipment requiring low power. Furthermore, there is a fundamental limit in the clock speed. Therefore, a code generator having simultaneous low power, high-speed capability is desired.
SUMMARY OF THE INVENTION
The present invention disclosed and claimed herein comprises a method for generating a maximal length sequence of data. An initial sequence of shift registers is first defined. A logic network is then provided which is operable to perform predetermined logic operations between select inputs thereto and select outputs therefrom. Various outputs from the shift registers are selectively input to the logic network to be operated thereon by the logic network. The results output from the logic network are then input to select ones of the shift registers. The contents of the shift registers are shifted in such a manner that the contents of at least two adjacent shift registers in the sequence of shift registers is shifted to an adjacent two of the shift registers in a single shift operation of the shift registers shifting the sequence therethrough.
In another aspect of the present invention, the shift registers are arranged in blocks of shift registers with each of the blocks having a length of N. The blocks are connected in a parallel configuration in an order from an input block to an output block, wherein each of the outputs of the shift registers in a preceding one of the blocks is input to the inputs of corresponding ones of the shift registers in the adjacent one of the blocks, with the last of blocks providing an N-bit output word. The logic network is operable to interconnect the outputs of select ones of the shift registers in the blocks to inputs of select ones of the shift registers with the predetermined logic function performed thereon. This interconnection operation is performed in accordance with a maximal length sequence algorithm, this algorithm requiring an initial sequence of data to be stored in the blocks of shift registers. Once the initial sequence is stored, it is shifted through the blocks of shift registers in N-bit increments to realize a maximal length sequence defined by the algorithm.
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Brady W. James
Corrielus Jean B.
Mosby April M.
Pham Chi H.
Telecky , Jr. Frederick J.
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