Parallel interface circuit having a n-byte buffer and tansmittin

Details Parallel interface circuit having a n-byte buffer and tansmittin Parallel interface circuit having a n-byte buffer and tansmittin

1994-07-26

1997-12-23

Lee, Thomas C.

395309, 395821, 395855, 395872, G06F 1300

Patent

active

057015465

ABSTRACT:
An n-byte buffer is able to store n bytes of data. A interrupt request signal generating circuit interrupts the processor of the peripheral apparatus after receiving the nth byte of the data. Accordingly, only one interrupt operation is needed to receive and input n bytes of data. Consequently, the number of interrupt operations is reduced and the data processing speed is improved.

REFERENCES:
patent: 4291370 (1981-09-01), Charles
patent: 4390967 (1983-06-01), Eglowstein et al.
patent: 4447878 (1984-05-01), Kinnie et al.
patent: 4509113 (1985-04-01), Heath
patent: 4534011 (1985-08-01), Andrews et al.
patent: 4535404 (1985-08-01), Shenk
patent: 4918597 (1990-04-01), Krishnan et al.
patent: 4941157 (1990-07-01), Taylor
patent: 4947366 (1990-08-01), Johnson
patent: 5123091 (1992-06-01), Newman
patent: 5394534 (1995-02-01), Kulakowski et al.
patent: 5459858 (1995-10-01), Lyon et al.

Affiliated with

Also associated with

Rating

Parallel interface circuit having a n-byte buffer and tansmittin does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Parallel interface circuit having a n-byte buffer and tansmittin, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel interface circuit having a n-byte buffer and tansmittin will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1809385