Parallel framer and transport protocol with distributed...

Pulse or digital communications – Transceivers

Reexamination Certificate

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C375S222000, C375S225000, C375S257000, C375S265000, C375S295000, C375S316000, C370S470000, C370S474000, C370S476000

Reexamination Certificate

active

06539051

ABSTRACT:

FIELD OF INVENTION
The present invention relates to the field of data communication. More specifically an embodiment of the present invention relates to the field of serially transmitting framing information bit-interleaved with data characters.
BACKGROUND OF THE INVENTION
Bit interleaved framing has been used in data communication in the past. It is used in PDH (Plesiochronous Digital Hierarchy) in normal voice level telecommunication. Telephone companies used bit interleaving in their T1 and T3 modes of operation. In a T3 line, a transmitter inserts framing bits at fixed locations in the data stream; e.g. one every 171 bits according to a pre-determined sequence of bits. At the receive end, the receiving device looks at one bit in the data stream and waits 170 bits and looks at the same bit location in the data stream again and repeats the process for several times. Each examined bit is compared for a match with the pre-determined sequence of framing bits. From the framing bits, a frame boundary is determined and individual bytes are taken out of the data stream. The framing bits give the boundary of the data transmitted.
The telephone companies, however, abandoned this method of framing when high-speed transmission, e.g., in excess of 45 Mbits/second, was required. At data rates faster than T3, voice and data are transmitted with SONET protocols which use character-based framing. SONET protocols are used for data rates greater than 51 Mbits/second. In SONET protocols, a sequence of framing characters is used to mark the frame boundaries. At the receiving end, detection of the sequence of framing characters provides the frame boundary.
However, character-based framing has its disadvantages. One disadvantage being that character-framing demarcation leaves gaps in time between data information characters. Gaps between a group of data information characters are not tolerated in certain types of data transmission. For example, in Radio Frequency (RF) communication where constant direct modulation is required (e.g., I/Q modulation), modulation cannot be stopped for even a brief period of time. Gaps in modulation caused by the presence of framing characters in the modulation vector stream are not tolerated. Therefore, a need exists for a method of sending framing information, for a character-oriented data stream operated faster than T3 rates, in a form that avoids the generation of gaps in the delivered character stream caused by the framing information.
Wireless (radio-frequency) cellular telecommunication generally uses several transmitting antennas, with each transmitter generating a signal consisting of both in-phase and quadrature modulation components. These modulation components are generally delivered to the transmitter as 19-bit binary symbols which are used as inputs to digital-to-analog (D/A) converters. In one example these signals may be provided to each transmitter across a 19-bit wide parallel path, with said path consisting of 18 bits of data and a parity bit, with new symbols provided continuously at a 70-MHz rate. The data throughput required for this example interface exceeds 1 Gbit/second.
As shown in
FIG. 1A
, parallel interfaces have generally been used to provide high-speed communication of data.
FIG. 1A
depicts a conventional communication system
180
for transmitting 19-bit source data. This conventional system sends data across a parallel data bus along with a clock. One implementation uses a 19-bit parallel bus for each of the data paths along with a 70-MHz clock. These signals are routed on a backplane between the source card and a digital to analog (D/A) card. Each source card presents six of these 19-bit buses which results in a high signal density on the backplane and its associated connectors. The wire density on the backplane is especially high when eight of these source cards are required for transmission. This requires the partitioning of the system based on the limitations of the backpanel and its connectors. In addition, the signals on these buses must also be sent with their associated clock, while maintaining skew control between all signals and their associated clock.
In parallel transmission systems, multiple signals are required to carry data from encoder cards to transmitter cards. The transfer of data is done across the backplane, as described in the previous text, and the multiple signals required for such transfer of data consume significant backplane resources. Specifically, if the cellular telecommunication supports a wide array of present and legacy communications standards, requiring separate sets of links for each standard, it will be very difficult to accommodate the extra links due to the limited routing resources and congestion on the backpanel. Therefore, a need exists for data transmission in excess of 1 Gbit/second without gaps in the stream of data transferred and without the use of a parallel-bus backplane.
FIG. 1B
illustrates an improved communication system
190
. To improve the method, the parallel bus of
FIG. 1A
was replaced with a set of LVDS (Low Voltage Differential Signaling) based serial links. Standard LVDS devices can accept and communicate parallel buses of 24-bits in width including a clock across four differential signal paths. The data is sent on several separate serial data streams, each carrying a subset of the total number of bits, along with a separate signal for the clock. According to this improved method, data is only serialized and not scrambled or encoded.
Therefore, the data is sent on several separate data streams, each serializing a number of bits, along with a separate link for the clock.
A disadvantage associated with the previous methods is that the multiple signals that make each communication channel (parallel or multiple LVDS serial) have to be delay matched, i.e., they have to be measured to the same electrical length. This is due to the fact that at the receiving end, data recovery is relative to the clock time reference received on one of the LVDS signals. If any signal path is slightly longer than the other, the receiving end samples the bits at the wrong place. Therefore, a slight difference in length between these four differential pairs may disturb the integrity of the data information captured at the receiving end.
Another disadvantage associated with the conventional methods is that because the data is not encoded or scrambled, it must be carried through a DC-coupled interface. This requires that the transmitter and receiver be coupled to a common signal ground reference, and often to a common power supply. This lack of encoding or scrambling also maximizes the inter-symbol interference between bits on the serial links. If the transmission is to occur over a significant distance; e.g., >10 m, the links will not operate. These conventional methods require several signals, are subject to increased inter-symbol interference and are limited to operation distances of less than 10 m.
SUMMARY OF THE INVENTION
Therefore, a need exists for a method to a) transfer character-oriented data at high speed and without gaps in the stream of data, b) decrease the number of signals needed to transfer said data on or across a backplane, and c) reduce the inter-symbol interference of the data being sent, d) while allowing operation distances greater than 10 m.
Accordingly, embodiments of the present invention concern a method, system, architecture, and circuitry for high-speed serial character-based data transmission using bit-interleaved framing, enabling the elimination of gaps in the stream of data characters during the transmission. Transmission of data characters over a serial link (e.g., a differential pair) reduces the number of signals on the backplane required to transmit this data relative to a parallel architecture. The use of a single link also eliminates any channel-to-channel signal skew requirements. This allows the maximum link length to be determined by the ability of the link receiver to resolve a signal, instead of the ability to maintain matched delays across multiple si

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