Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2008-03-04
2008-03-04
Payne, David C. (Department: 2611)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
C375S293000, C375S294000
Reexamination Certificate
active
10690898
ABSTRACT:
A circuit for single or parallel digital fractional interpolation of data samples has a fractional interpolator filter, an oscillator for outputting timing signals to the fractional interpolator filter, and a detector loop with a strobe feedback from the oscillator for outputting a frequency adjustment to the oscillator. Three different approaches are shown to determine the frequency adjustment. One approach is to generate a pulse based on the symbol clock, and measure the differences between the pulse and the strobe and between the strobe and the pulse. The smaller is the frequency adjustment. Another approach is to adjust the strobe period to match the symbol clock period. A third approach is to add an oscillator-driven clock to the symbol clock and integrate the sum over a symbol clock period to generate the frequency adjustment. Preferably, the interpolator filter takes N parallel inputs and samples each in parallel based on a plurality of oscillator timing signals, each corrected with reference to the frequency adjustment.
REFERENCES:
patent: 5805619 (1998-09-01), Gardner et al.
patent: 5812608 (1998-09-01), Valimaki et al.
patent: 5832043 (1998-11-01), Eory
patent: 6353369 (2002-03-01), Boerstler
patent: 2003/0069009 (2003-04-01), Harnden et al.
patent: 2003/0204542 (2003-10-01), Mueller
patent: 2004/0148319 (2004-07-01), Bossmeyer et al.
Fredric J. Harris, “Multirate Digital Filters for Symbol Timing Synchonization in Software Defined Radios”, IEEE Journal on Selected Areas in Communications, vol. 19, No. 12, Dec. 2001, pp. 2346-2357.
Floyd M. Gardner, “Interpolation in Digital Modems-Part I: Fundamentals”, IEEE Transactions on Communications, vol. 41, No. 3, Mar. 1993, pp. 501-507.
Lars Erup, “Interpolation in Digital Modems-Part II: Implementation and Performance”, IEEE Transactions on Communications, vol. 41, No. 6, Jun. 1993, pp. 998-1008.
Gabriel Watkins, “Optimal Farrow Coefficients for Symbol Timing Recovery”, IEEE Communications Letters, vol. 5, No. 9, Sep. 2001, pp. 381-383.
Jussi Vesma et al., “The Effects of Quantizing the Fractional Interval in Interpolation Filters”, Tampere University of Technology, Finland.
V. Valimaki and T. I. Laakso, “Principles of Fractional Delay Filters”, IEEE International Conference on Acoustics, Speech, and Signal Processing, Istanbul, Turkey, Jun. 2000, pp. 1-4.
Gibson, Jr. L. Andrew
Haddadin Osama Sami
Nelson David Scott
Pulsipher Michael Dennis
Bolourchi Nader
Harrington & Smith PC
L-3 Communications Corporation
Payne David C.
LandOfFree
Parallel fractional interpolator with data-rate clock... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Parallel fractional interpolator with data-rate clock..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel fractional interpolator with data-rate clock... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3939028