Patent
1997-03-21
1999-02-16
Shah, Alpesh W.
G06F 1580
Patent
active
058729887
ABSTRACT:
A data processing device, including a plurality (VP) of elementary processors (EP) which operate in parallel in a so-called common instruction mode acting on multiple data, and means (VSU) for collectively processing data (OB1-OBn) supplied by said elementary processors. The device includes a concatenated data path (DP) enabling an arbitrary elementary processor to communicate with at least one adjoining elementary processor. Input and output controllers (13,19) enable communication with a common input bus (ID). The processing utilizes vector-scalar transformation units (VSU), scalar-vector units (SVCU) and scalar-scalar units (SSU). Each device comprises an interface for connection to either other, identical devices or to external members (memory, controller, data look-up table . . . ).
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Barschall Anne E.
Bartlett Ernestine C.
Shah Alpesh W.
U.S. Philips Corporation
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