Parallel cyclic redundancy checking circuit

Details Parallel cyclic redundancy checking circuit Parallel cyclic redundancy checking circuit

1982-08-25

1984-06-12

Atkinson, Charles E.

Excavating

371 37, G06F 1110

Patent

active

044546009

ABSTRACT:
A parallel cyclic redundancy checking circuit which determines the validity of digital, binary, cyclical data. The parallel structure of this circuit enables it to check high frequency data. Shift registers store sequentially occurring parallel groups of data and a feedback network comprising exclusive-or gates provides a coding arrangement which produces a resultant data pattern to indicate the validity of the cyclical parallel input data. Resultant data patterns are periodically stored in a random-access-memory which initializes the shift registers to provide a time sharing operation. A comparator detects invalid data by comparing the resultant patterns with expected values.

REFERENCES:
patent: 3452328 (1969-06-01), Hsiao et al.
patent: 3703705 (1972-11-01), Patel
patent: 3859630 (1975-01-01), Bennett
Konemann et al., Built-In Test for Complex Digital Integrated Circuits, IEEE Journal of Solid-State Circuits, vol. SC-15, No. 3, Jun. 1980, pp. 315-319.

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