Parallel conversion circuit

Coded data generation or conversion – Digital code to digital code converters – Serial to parallel

Reexamination Certificate

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Details

C341S101000

Reexamination Certificate

active

07463171

ABSTRACT:
Disclosed is a serial-to-parallel conversion circuit that detects phase difference between a timing of receiving serial receive data and reconstituting parallel data for each symbol and a timing of outputting the reconstituted parallel data to an inside of an LSI, and outputs the detected phase difference as delay time information.

REFERENCES:
patent: 5598156 (1997-01-01), Hush et al.
patent: 6911923 (2005-06-01), Wang et al.
patent: 6985096 (2006-01-01), Sasaki et al.
patent: 7049983 (2006-05-01), Azami et al.
patent: 2005/0220089 (2005-10-01), Kawashima
patent: 2005-295117 (2005-10-01), None

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