Parallel computer and processor element utilizing less memory

Details Parallel computer and processor element utilizing less memory Parallel computer and processor element utilizing less memory

1994-05-09

1997-07-01

Moore, David K.

39542111, 395410, 395418, 395300, 395800, G06F 926, G06F 934, G06F 1200, G06F 1202

Patent

active

056447493

ABSTRACT:
The present invention discloses processor elements interconnected via a network in a parallel computer. The processor element includes a memory unit for storing a program and, per array-variable name, a partitioned array variable, the program being run simultaneously by the processor elements, each partitioned array variable being allocated to respective processor elements, a processor for carrying out a calculation using the partitioned array variable in the memory unit, the partitioned array variable being accessed by being addressed with a variable-name address that includes a code representing an array-variable name, an address converting unit for holding a variable-name address in relation with a physical address on the memory unit for each partitioned array variable to output a corresponding physical address in response to an input of the variable-name address from the processor, a transferring unit for transferring an array variable per array-variable name with the other processor elements via the network, the array variable being transferred to be stored into a free area acquired in the memory unit when a partition direction changes, the free area being as large as a storage area for one partitioned array variable, an address-correspondence updating unit for updating an address correspondence in the address converting unit with a pre-transfer variable-name address in relation with a post-transfer physical address each time the transferring unit completes the transfer per array-variable name.

REFERENCES:
patent: 4514807 (1985-04-01), Nogi et al.
patent: 4873626 (1989-10-01), Gifford
patent: 5129093 (1992-07-01), Muramatsu et al.
patent: 5230079 (1993-07-01), Grondalski
patent: 5408677 (1995-04-01), Nogi et al.
"Parallel Programming Language ADETRAN" by Tatsuo Nogi, Memoirs of the Faculty of Engineering, Kyoto University, vol. L1, Part 4, Oct. 1989, pp. 235-290.

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