Parallel computation processor, parallel computation control...

Details Parallel computation processor, parallel computation control... Parallel computation processor, parallel computation control...

2006-11-14

2006-11-14

Coleman, Eric (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Superscalar

C712S241000

Reexamination Certificate

active

07136989

ABSTRACT:
A parallel computation processor being capable of high-speed loop operation. When instruction decoders decode the VLOOP instruction, which triggers loop operation, an instruction buffer starts storing normal instructions. The instruction buffer dispatches a VLIW instruction composed of n pieces of normal instructions to execution units each time n pieces of instructions are stored therein. The execution units concurrently execute the instructions. After all instructions comprised in a loop have been stored in the buffer and once dispatched as VLIW instructions to be executed, the loop is executed repeatedly.

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