Parallel channel equalizer architecture

Details Parallel channel equalizer architecture Parallel channel equalizer architecture

1987-12-21

1989-04-11

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

371 2, 333 18, H03K 5159

Patent

active

048212881

ABSTRACT:
Plural n-symbol codewords are helically interleaved and transmitted in a stream. A receiver views the transmitted stream through n time windows, each time window having a length accommodating the longest anticipated decorrelation time of the channel. Individual equalizers process the data in individual windows. The n windows simultaneously furnish the n symbols of each codeword to an error correction decoder. The n equalizers respond to feedback in which the output of the decoder is substituted in place of undecoded symbols from the n windows whenever available.

REFERENCES:
patent: 3750145 (1973-07-01), Klein
patent: 4293952 (1981-10-01), Tamori et al.
patent: 4468786 (1984-08-01), Davis
patent: 4555788 (1985-11-01), Merrill
patent: 4559625 (1985-12-01), Berlekamp et al.
patent: 4575857 (1986-03-01), Murakami

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