Parallel cascaded integrator-comb filter

Pulse or digital communications – Receivers – Interference or noise reduction

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36472401, 364829, H04B 110

Patent

active

055966098

ABSTRACT:
A high speed digital filter for use in digital interpolation and decimation provides a parallel processing implementation for integrator stages of a cascaded integrator-comb (CIC) filter. The parallel structure of the present invention is easily cascadeable since it allows subsequent integrator stages access to intermediate samples generated by preceding integrator stages. The parallel integrator structure may be implemented directly or may be reduced in complexity by removing redundant logic for use in decimator output sections or interpolator input sections. The parallel implementation of a CIC filter allows much higher sample rate filtering to be implemented with fewer standard CMOS logic devices than currently recognized implementations.

REFERENCES:
patent: 5212659 (1993-05-01), Scott et al.
patent: 5323391 (1994-06-01), Harrison
patent: 5327133 (1994-07-01), Greene
Riley et al, "High-Decimation Digital Filter", ICASSP '91: Acoustics, Speech & Signal Processing Conf. 1991. pp. 1613-1616.

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