Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-08-29
2006-08-29
Phung, Anh (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S230030
Reexamination Certificate
active
07099233
ABSTRACT:
A method is disclosed to carry out a data access operation in a data memory device that is subdivided into a plurality of memory arrays each array includes a plurality of memory cells accessible by an identifiable address. The method includes a step of asynchronously propagating in parallel a plurality of data access signals, each through a data access path over multiple propagation stages of signal lines interconnected between the memory arrays and each of the multiple propagation stages implementing an asynchronous local clock for receiving and sending said data access signals for carrying out said data access operation. The method further includes a step of adding a path delay in a selected set of the propagation stages to minimize a length of time difference in carrying out the data access operations through each of the different data access paths. The method further includes a step of generating a pulse train in each of the propagation stages for inputting to the local clock of a subsequent propagation stage for initiating the local clock of the subsequent propagation stage for propagating the data access signals.
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Lin Bo-In
Phung Anh
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