Parallel and iterative algorithm for switching data packets

Details Parallel and iterative algorithm for switching data packets Parallel and iterative algorithm for switching data packets

2007-07-24

2007-07-24

Ferris, Derrick W. (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S360000

Reexamination Certificate

active

10213407

ABSTRACT:
The invention relates to a packet switching device with a plurality of input and output ports and at least one switching unit (3to5) comprising a coupling matrix and an arbiter unit (9) for controlling the coupling matrix (8), whereinthe arbiter unit is designed for generating a state matrix (11) whose lines each correspond to an input port and whose columns each correspond to an output port,said state matrix comprises elements which each represent a weighting for an interconnection between an input port and an output port of the packet switching device, andsaid arbiter unit (9) is designed for forming a first decision matrix consisting of several accepted interrelationships on the basis of an algorithm which is operative in parallel on several groups (12and14) of columns of the state matrix.

REFERENCES:
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patent: 5500858 (1996-03-01), McKeown
patent: 5923656 (1999-07-01), Duan et al.
patent: 6570873 (2003-05-01), Isoyama et al.
patent: 2003/0031193 (2003-02-01), Andrews et al.
002250376, Jun. 1999, Germany.
10196315A, Oct. 16, 1995, USA.

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