Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Patent
1988-12-13
1990-05-08
Shoop, Jr., William M.
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
341155, 341158, H03M 136
Patent
active
049242270
ABSTRACT:
The apparatus comprises a parallel analog-to-digital converter comprising a matrix of differentially coupled transistor pairs wherein the base of one transistor of each differential pair is coupled to a reference voltage and the base of the other transistor of each differential pair is coupled to the input voltage through a specified offset. In each row of differential pairs, the collectors of the transistors are alternately coupled to first and second row output points. The first and second row output points of each row are coupled to the inverting and non-inverting inputs, respectively of a comparator. Additional comparators are provided for comparing the second row output of each row with the first row output of the succeeding row. The matrix is arranged such that the combination of the comparator outputs is unique for each possible digital level in the full scale range of the converter. Logic circuitry is coupled to the comparator outputs to produce a computer usable code therefrom.
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R. E. J. Van de Grift, I. W. J. M. Rutten and M. Van der Veen, An 8-Bit Video ADC Incorporating Folding and Interpolation Techniques, IEEE Journal of Solid-State Circuits, vol. sc-22, No. 6, Dec. 1987.
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Analog Devices Inc.
Shoop Jr. William M.
Young Brian K.
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