Parallel adding and averaging circuit and method

Details Parallel adding and averaging circuit and method Parallel adding and averaging circuit and method

1993-11-29

1999-03-16

Mai, Tan V.

Boots, shoes, and leggings

364749, 36478601, G06F 738, G06F 750

Patent

active

058838244

ABSTRACT:
An apparatus that can also be used for generating the average of two integers. The apparatus can be divided into a plurality of sub-adders that operate on sub-words of the input integers in parallel. Hence, the adder can be used for adding or subtracting one set of two integers wherein each integer is of some predetermined length or a plurality of sets of two integers provided the sum of the lengths of the integers is less than or equal to this predetermined length. The apparatus can also generate the sum, or difference, of each of the sub-words divided by two. The parallel operations can be carried out in response to a single instruction. The results of the division by two are rounded in a manner that eliminates biasing of the results.

REFERENCES:
patent: 3987291 (1976-10-01), Gooding et al.
patent: 4137568 (1979-01-01), Dlugas
patent: 4707800 (1987-11-01), Montrone et al.
patent: 4768160 (1988-08-01), Yokoyama
patent: 4789953 (1988-12-01), Gerrath
patent: 4914617 (1990-04-01), Putrino et al.
patent: 5047975 (1991-09-01), Patti et al.
patent: 5189636 (1993-02-01), Patti et al.
Ire Wescon Convention Record, Paper 16/4, Sep. 1977, North Hollywood, CA USA "The Next Generation Four-Bit Bipolar Microprocessor Slice", Coleman et. al., pp. 1-19.
Information Processing Letter, Amsterdam, Jul. 1977, vol. 3, No. 6, "Should The Stable Rounding Rule Be Radix-Dependent?", Keir, pp. 188-189.
Patent Abstracts of Japan, vol. 9, No. 13, (P-328) Jan. 19, 1985, Pat. No. P59161731, (Hitachi Seisakusho) * Abstract*.
Patent Abstracts of Japan, vol. 10, No. 175, (E-413) Jun. 20, 1986, Pat. No. P61024331, (Nippon Denki) * Abstract*.

Affiliated with

Also associated with

Rating

Parallel adding and averaging circuit and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Parallel adding and averaging circuit and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel adding and averaging circuit and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-823035