Parallel access memory system

Communications: electrical – Land vehicle alarms or indicators – Internal alarm or indicator responsive to a condition of the...

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Details

340707, 340750, 340799, 364900, 365220, G06K 1520

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active

041503643

ABSTRACT:
Memory system having contiguous storage locations with sequential addresses is partitioned into units to permit separate unit write-in and parallel unit read-out, operations. Each unit is responsive to common word address signals and unique combinations of block address signals. In response to a control signal in a first of two possible states, the memory system operates in a conventional manner, i.e., data is read from or written to a particular location in the memory to or from a data bus, the address of the particular location being supplied over an address bus and having a block select portion and a word select portion. When the control signal is in its second state, each unit is responsive only to the word address signals to read data from or write data to common word locations in each unit simultaneously. Several utilization devices can be similarly arranged so that when the control signal is in the second state, each device is coupled directly to an associated one of the units and all units and devices are decoupled from the data bus. Another embodiment of the invention provides parallel memory access without switching elements. A system is also described which is especially adaptable to color television display of information.

REFERENCES:
patent: 3345458 (1967-10-01), Cole et al.
patent: 3854130 (1974-12-01), Ligocki
patent: 3891890 (1975-06-01), Yasuda et al.

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