Parallel access computer memory system employing a power-of-two

Details Parallel access computer memory system employing a power-of-two Parallel access computer memory system employing a power-of-two

1980-06-04

1983-08-23

Gruber, Felix D.

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364900, G06F 1516

Patent

active

044007680

ABSTRACT:
In a parallel data processing system architecture capable of processing in parallel a plurality of data elements from a linear vector stored in a memory module array having in number a power-of-two memory modules, a high degree of conflict-free access to the stored linear vector data elements is achieved through skewed storage wherein a skewing occurs at every Mth address and a further skewing at every M.sup.2 address wherein M (a power-of-two) is equal to the number of memory modules. The data elements are fetched through a connection network for processing in a processor array having in number a power-of-two processors.

REFERENCES:
patent: 4051551 (1977-10-01), Lawrie et al.

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