Panning while displaying a portion of the frame buffer image

Details Panning while displaying a portion of the frame buffer image Panning while displaying a portion of the frame buffer image

2005-03-08

2005-03-08

Razavi, Michael (Department: 2672)

Computer graphics processing and selective visual display system

Computer graphics processing

Graphic manipulation

C345S559000

Reexamination Certificate

active

06864900

ABSTRACT:
A graphics system and method for panning from one portion of a stored image to another portion of the image includes a frame buffer, one or more display devices, one or more raster parameter registers, and one or more raster parameter updaters. The image is stored in the frame buffer and each display device is configured to display less than the entire image. A panning operation is initiated by requesting an update of one or more of the raster parameter registers during a next blanking period.

REFERENCES:
patent: 4586036 (1986-04-01), Thomason et al.
patent: 4642794 (1987-02-01), Lavelle et al.
patent: 4714919 (1987-12-01), Foster
patent: 4780709 (1988-10-01), Randall
patent: 4874164 (1989-10-01), Miner et al.
patent: 4918436 (1990-04-01), Johary
patent: 5006837 (1991-04-01), Bowers
patent: 5083119 (1992-01-01), Trevett et al.
patent: 5200738 (1993-04-01), Fumoto et al.
patent: 5526024 (1996-06-01), Gaglianello et al.
patent: 5537128 (1996-07-01), Keene et al.
patent: 5544306 (1996-08-01), Deering et al.
patent: 5640332 (1997-06-01), Baker et al.
patent: 5727192 (1998-03-01), Baldwin
patent: 5757381 (1998-05-01), Shoji et al.
patent: 5777601 (1998-07-01), Baker et al.
patent: 5790110 (1998-08-01), Baker et al.
patent: 5798749 (1998-08-01), Minematsu et al.
patent: 5805173 (1998-09-01), Glennon et al.
patent: 5812204 (1998-09-01), Baker et al.
patent: 5920302 (1999-07-01), Inoue et al.
patent: 5945997 (1999-08-01), Zhao et al.
patent: 5949437 (1999-09-01), Clark
patent: 5956046 (1999-09-01), Kehlet et al.
patent: 5963200 (1999-10-01), Deering et al.
patent: 6020901 (2000-02-01), Lavelle et al.
patent: 6118413 (2000-09-01), Bril et al.
patent: 20020070970 (2002-06-01), Wood et al.
GDC Press Release via Web “GDC marks first North American public showing”, “http://www.matrox.com/mga/media_center/press_rel/1990/g400_gdc.cfm”.
Pacifica RAMDAC spec BT497/8 from Brooktree, Feb. 1996, 53 pages.
“Sun™ Elite3D Frame Lock and Buffer Swap Synchronization Installation Guide”, Aug. 1999, 42 pages.
3D-RAM Spec 8 Press Release dated May 20, 1997, 2 pages.
3D-RAM Spec www.mitsubishichips.com/data/datasheets/memory/mempdf/ds/c99001.pdf, (date Aug. 1996 given in press release, see A3), 170 pages.

Affiliated with

Also associated with

Rating

Panning while displaying a portion of the frame buffer image does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Panning while displaying a portion of the frame buffer image, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Panning while displaying a portion of the frame buffer image will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3375478