Paging receiver with LPC speech synthesizer

Details Paging receiver with LPC speech synthesizer Paging receiver with LPC speech synthesizer

1987-11-27

1988-09-06

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

379 56, 379 88, H04B 700, H04Q 702

Patent

active

047696427

ABSTRACT:
A paging receiver with an LPC speech synthesizer is described. The paging receiver of the present invention includes a controller and decoder, and a microprocessor controlled speech synthesizer both coupled to a dual port memory. Digitally encoded voice messages are stored in a dual port memory which includes a scratchpad area for storing control words and address pointers which indicate the attributes and location of stored digitally encoded voice messages. Messages are reconstructed by reading the control words and address pointers and processing the information stored in memory with a speech synthesizer. The structure is adapted to store and process LPC encoded signals and it permits a message to be stored while another is being reproduced. In addition, information contained in the control words permits old or read messages to be discarded if a new message must be stored.

REFERENCES:
patent: 4330689 (1982-05-01), Kang et al.
patent: 4389537 (1983-06-01), Tsunoda et al.
patent: 4479124 (1984-10-01), Rodriguez et al.
patent: 4480253 (1984-10-01), Anderson
patent: 4518961 (1985-05-01), Davis et al.
patent: 4701943 (1987-10-01), Davis et al.
Tremain, Thomas E., "The Government Standard Linear Predictive Coding Algorithm: LPC-10", Speech Technology, Apr. 1982, pp. 40-49.

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