Paged memory mapping with elimination of recurrent decoding

Boots – shoes – and leggings

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G06F 1300

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active

041582276

ABSTRACT:
A memory expansion apparatus is disclosed which provides for expansion of memory capacity by use of logic associated with memory modules. The logic provides for selection of one of a plurality of pages, each having substantially the same address therefor. The device provides for the selection by utilization of a special instruction, and includes decoding means for specialized bits in the instruction. Means are provided wherein repeated access to the same page in a block occurs free of a requirement of repeated address decoding amongst the plurality of pages in the block.

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