Page-mode memory device with multiple-level memory cells

Details Page-mode memory device with multiple-level memory cells Page-mode memory device with multiple-level memory cells

1997-06-05

1998-05-26

Fears, Terrell W.

Static information storage and retrieval

Addressing

Optical

36518904, 36518533, G11C 1300

Patent

active

057577196

ABSTRACT:
A page-mode semiconductor memory device comprises a matrix of memory cells arranged in rows and columns, each row forming a memory page of the memory device and comprising at least one group of memory cells, memory page selection means for selecting a row of the matrix, and a plurality of sensing circuits each one associated with a respective column of the matrix. The memory cells are multiple-level memory cells which can be programmed in a plurality of c=2b(b>1) programming states to store b information bits, and the sensing circuits are serial-dichotomic sensing circuits capable of determining, in a number b of consecutive approximation steps, the b information bits stored in the memory cells, at each step one of said b information bits being determined, said at least one group of memory cells of a row forming a number b of memory words of a memory page.

REFERENCES:
patent: 5337281 (1994-08-01), Kobayashi et al.

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