Page mapping system

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G06F 1200

Patent

active

047589469

ABSTRACT:
A page mapping system for virtual memory that requires only one address to be continually resident in memory per user subspace and permits the size of a process subspace to be varied dynamically. The system provides a tree of page map pages ("PM pages") with only the very root of the tree (a base address entry) being required to be in physical memory. Depending on the size of the space, the page map includes, as well as the base address entry, a number of paged levels with one PM page at the highest level (to which PM page the base address entry points). The page map entries (PMEs) of the first level PM pages point directly to the physical pages. Each PME in a higher level of the page map points to a PM page at a lower level in the page map, whereupon the page map may grow geometrically from the highest level to the first level. The PMEs for pages or PM pages that are not allocated are so marked. The number of levels of the page map is dynamic, and may be increased should the subspace need to be increased to a size that exceeds the maximum size that can be mapped by the page map of a present number of levels. The page map includes within it a representation of the number of levels.

REFERENCES:
patent: 4136385 (1979-01-01), Gannon et al.
patent: 4155119 (1979-05-01), DeWard et al.
patent: 4186438 (1980-01-01), Benson et al.
patent: 4253145 (1981-02-01), Goldberg
"The Multics Virtual Memory: Concepts and Design" written by Clinger and Daley, Comm. of the ACM, May 1972, vol. 15, #5, pp. 308-318.

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