Page buffer of flash memory device and data program method...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185170, C365S185250, C365S185330, C365S189050

Reexamination Certificate

active

07046554

ABSTRACT:
Disclosed are a page buffer of a flash memory device and data program method using the same. After two data are sequentially stored in a main register (first latch) and a cache register (second latch) provided in a page buffer, they are respectively transferred to an even bit line and an odd bit line at the same time, and a bias needed for a program is applied to cells connected to the even bit line and the odd bit line, respectively, whereby the program is performed at the same time. Therefore, the number and time of operations for data loading, program operation and program verification can be reduced by half and the operating speed of the device can be improved.

REFERENCES:
patent: 6813184 (2004-11-01), Lee
patent: 2003/0117856 (2003-06-01), Lee et al.
patent: 2004/0141402 (2004-07-01), Kim

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