Pad rearrangement substrate

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Smart card package

Reexamination Certificate

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Details

C257S734000

Reexamination Certificate

active

07095102

ABSTRACT:
A pad rearrangement substrate includes an internal terminal provided on a mounting plane of a dielectric substrate, an external terminal provided on the external terminal plane of the dielectric substrate, an internal wiring pattern connecting the external terminal to the internal terminal, an antenna pattern provided at a corner portion of the external terminal plane of the dielectric substrate, an external terminal provided on the external terminal plane of the dielectric substrate, and a dielectric layer. The antenna pattern is connected to the dummy external terminal. The dielectric layer coats the external terminal plane of the dielectric substrate except the external terminal and the dummy external terminal.

REFERENCES:
patent: 5917706 (1999-06-01), Steffen
patent: 6235553 (2001-05-01), Kawan
patent: 6597061 (2003-07-01), Wallace
patent: 2002/0158323 (2002-10-01), Iwasaki
patent: 2003/0141580 (2003-07-01), Fukunaga
patent: 56-157590 (1981-12-01), None
patent: 58-016552 (1983-01-01), None
patent: 03-006858 (1991-01-01), None
patent: 04-365396 (1992-12-01), None
patent: 06-183189 (1994-07-01), None
patent: 08-307087 (1996-11-01), None
patent: 10-198778 (1998-07-01), None
patent: 2000-010687 (2000-01-01), None
patent: 2000-261163 (2000-09-01), None
patent: 2001-144469 (2001-05-01), None
patent: 1998-068706 (1998-10-01), None

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