Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-05-15
2001-08-14
Olms, Douglas (Department: 2661)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S401000, C370S466000, C370S470000, C370S474000
Reexamination Certificate
active
06275494
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a packet switching system and, more particularly, to a packet switching system which, in sending and receiving packets over ATM (Asynchronous Transfer Mode) lines, switches the packets based on the IP (Internet Protocol) routing protocol.
Recent years have seen a surge in traffic of packet communications based on the IP thanks in part to the introduction of novel applications such as the WWW (World Wide Web). IP packet switching was carried out conventionally on a packet-by-packet basis with reference to a routing table prepared according to the IP routing protocol. The switching was conducted primarily by software, and it was desired to increase the speed of the processing in the face of an ever-swelling volume of traffic.
One way to address the need for high-speed processing has been proposed in the form of a packet switching system by P. Newman, et al. “Flow Labeled IP: A Connectionless Approach ATM”, Proc. IEEE Infocom, March 1996, pp. 1-10 and Japanese Patent Laid-open (Kokai) No. Hei 8-125692. The proposed packet switching system combines two processes: packet-by-packet processing based on a routing table, and processing of individual ATM cells using ATM switches.
The above packet switching system has a packet processor called IP controller connected to each input/output line of an ATM switch. When IP packets arrive in the form of assembled ATM cells, the cells are sent to the IP controller for a while via the ATM switch. The IP controller reassembles the cells to a IP packet. The destination of each packet to which the cells are reassembled is decided by referring to a routing table as has been done conventionally. The cells are again assembled from the packet and sent via the ATM switch to the output lines bound for their destinations.
If a specific condition is met (e.g., if a predetermined number of packets having the same part of header have arrived), the IP controller allocates a dedicated VC (Virtual Channel) to the packets that were hitherto multiplexed on the same VC as other IP packets. The IP controller then informs the input interface in the ATM switch of a VPI (Virtual Path Identifier) and a VCI (Virtual Channel Identifier) of the input line for the IP packets in question, as well as an output line number and a VPI and a VCI of the output line.
Thereafter, of the IP packets that have arrived at the input interface, those whose headers are partially the same (this group of packets is called a flow hereunder), are switched in the form of ATM cells by the ATM switch without passing through the IP controller. The switched IP packets are placed onto the output line bound for the destination (this operation is called a cut-through hereunder). This eliminates the need for having to switch each packet by referring to the routing table, whereby high-speed packet switching based on the ATM switch is implemented.
Conventionally, it has been necessary for a plurality of packet switching systems to allocate dedicated VCs therebetween for each flow of packets when carrying out a cut-through. Therefore, where large quantities of packets need to be processed, the resource allocation becomes a bottleneck. The following is a list of problems to be solved in conventional apparatus:
(1) Throughput is limited.
(2) The input interface of each ATM switch needs to have connection information set for each flow. Under size constraints of the table permitted for the input interface, only a limited number of flows is handled by cut-through operations.
(3) Delays in the dedicated VC resource allocation prevent the cut-through from providing any appreciable improvement in performance for packet transfers of short holding times.
(4) Where packets are transferred through a plurality of packet switching systems connected in a multi-stage structure, no significant improvement in performance is attained if none of the switching systems performs a cut-through.
On the other hand, a way to provide an idle VC table for retrieving unused VCIs and set a direct channel for transmitting and receiving ATM cells sharing the same destination by setting VCs corresponding to transmission demand has been proposed by U.S. Pat. No. 5,452,296. This way brings realizing a cut-through action in the inside of the ATM switching system and lessen a switching delay. However, since the direct channel is not set in each switching system without a setting time, there is still the problem to be solved that there is little effect of lessening a total switching delay in the entire switching network.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a large-capacity packet switching system which has only small delays in cut-through and has limited constraints on the number of flows that can be handled by the cut-through action.
In carrying out the invention and according to one aspect thereof, there is provided a packet switching system including: switching means accommodating a plurality of input/output ATM lines; packet destination determining means for determining the destination of a packet on a routing protocol; packet reassembling means for reassembling ATM cells to a packet; cell assembling means for assembling ATM cells from a packet; VPC (Virtual Path Connection) setting means for setting up a VPC among the packet switching systems; and VCC (Virtual Channel Connection) allocating means for allocating an idle VCC existing in the VPC to packets sharing the same part of header.
The packet switching system may include input and output interfaces, an ATM switch and a control processor. The ATM switch includes the above-mentioned switching means, and the control processor includes the remaining means. The input interface is located between the input ATM line connected to the packet switching system and the ATM switch. The output interface is located between the output ATM line connected to the packet switching system and the ATM switch. The input interface changes incoming ATM cells from the input ATM line into internal cells and forwards them to the ATM switch. The output interface turns the internal cells from the ATM switch into ATM cells and sends them to the output ATM line. In the description that follows, packet switching systems located at the input/output parts, namely the peripheral part, of a network will be called edge nodes, and packet switching systems positioned at the transit points, namely the inner part, of the network will be called transit nodes.
Gateways are provided between each of the input and output points of the network and the edge nodes. The gateway located at the input part turns incoming packets from the input point of the network into ATM cells and sends the cells to the edge node located at the input part. In the description that follows, the gateway at the input part will be called a sending-side gateway, and the edge node at the input part will be called a sending-side edge node. The gateway located at the output part turns the ATM cells received from the edge node located at the output part into packets and forwards the packets to the output point of the network. In the description that follows, the gateway at the output part will be called a receiving-side gateway, and the edge node at the output part will be called a receiving-side edge node.
Since a VPC is assigned up among packet switching systems by the invention, the transit node performs VP (Virtual Path) switching only and does not perform VC switching. Thus produces VCCs provided in the VPC are unchanged. Therefore, large capacity switching can be realized in the transit switching system thanks to few constrains on the number of flows.
Further, since packets sharing the same part of header are allocated to a VCC and treated collectively, then an easy cut-through can be realized.
It is desired that the packet switching system of the invention has mapping means for mapping correspondence between a packet destination and a VPC. This produces an effect of rapid setting of a VPC.
Moreover, it is desired that the packet switching syst
Abe Hajime
Endo Noboru
Miki Kazuho
Takase Akihiko
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Hom Shick
Olms Douglas
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