Packet switching system

Details Packet switching system Packet switching system

1983-03-25

1985-11-05

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

370 83, 34082568, 340717, H04Q 900, H04J 312

Patent

active

045517207

ABSTRACT:
A packet switching system includes encoding circuitry for generating and intermittently transmitting a plurality of data packets in serial bit stream format. Each data packet consists of a plurality of data words and one or more address words where each such word includes an initial constant value start bit, either a data byte or an address byte, and a steering bit which indicates whether the word is the last to occur address word in the packet. The address byte represents a dimensional identity common to all of the data words in the data packet. The system also includes decoding circuitry including a start bit decoder for sensing the presence of a start bit and a shift register having a number of storage locations equal to the total number of bits in the one or more address bytes, into which bits from the serial bit stream are serially shifted. A register control circuit enables the shift register to receive only the address or data byte bits. A steering bit circuit senses the occurrence of the steering bit and generates an output signal when the word being received is the last to occur address word.

REFERENCES:
patent: 4091361 (1978-05-01), Eichelberger et al.
patent: 4125746 (1978-11-01), Downey et al.
patent: 4156111 (1979-05-01), Downey et al.
patent: 4168469 (1979-09-01), Parikh et al.
patent: 4438432 (1984-03-01), Hurcum

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