Packet switching apparatus

Details Packet switching apparatus Packet switching apparatus

2006-02-14

2006-02-14

Pham, Chi (Department: 2667)

Multiplex communications

Fault recovery

Bypass an inoperative channel

C370S387000, C370S217000

Reexamination Certificate

active

06999413

ABSTRACT:
A packet switch has a switch section formed by a plurality of crossbar switch planes and plurality of interfaces, and each interface outputs in parallel input packets in block units to the plurality of crossbar switch planes in response to signals from a scheduler, wherein when n crossbar switch planes can be mounted on the packet switch, each interface allocates time slots corresponding to the n crossbar switch planes or when a switch plane is additionally mounted, a block is read at a time slot corresponding to the additional switch plane or when a switch plane is stopped from working, an idle time slot is used to prevent a block from being output to the switch plane which is unused.

REFERENCES:
patent: 5414696 (1995-05-01), Tsuzuki et al.
patent: 6256293 (2001-07-01), Gerstel et al.
patent: 6263415 (2001-07-01), Venkitakrishnan
patent: 2001/0030942 (2001-10-01), Suzuki
patent: 0918419 (1998-11-01), None
patent: 1009132 (1999-12-01), None
“Tiny Tera: A Packet Switch Core,” Nick McKeown, Martin Izzard, Adisak Mekkittikul, William Ellersick and Mark Horowitz, IEEE Micro, 1997, pp. 26-33.

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