Multiplex communications – Pathfinding or routing – Combined circuit switching and packet switching
Reexamination Certificate
1998-02-18
2001-04-24
Hsu, Alpus H. (Department: 2662)
Multiplex communications
Pathfinding or routing
Combined circuit switching and packet switching
C370S395430, C370S400000
Reexamination Certificate
active
06222839
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a packet switching apparatus for connecting a packet switching network such as an asynchronous transfer mode (ATM) network and the like with another communication network.
2. Description of the Related Art
A former packet switching apparatus is described taking a case of connecting a local area network (LAN) and an ATM network with each other as an example.
FIG.
18
(A) is a block diagram roughly showing a connection relation of ATM switching apparatuses and a LAN terminal, and FIG.
18
(B) is a conceptual diagram roughly showing a logical structure of each of the ATM switching apparatuses and the LAN terminal.
In FIG.
18
(A), the ATM switching apparatuses
1801
,
1802
and
1803
, which are connected with one another through ATM lines
1810
and
1810
, form an ATM network. Although the three ATM switching apparatuses
1801
,
1802
and
1803
are connected in series with one another in order to simplify description in FIG.
18
(A), actually the number of ATM switching apparatuses may be more and the ATM switching apparatuses may be connected with one another in the shape of a ring, a mesh or the like by means of the ATM lines
1810
.
In FIG.
18
(A), the ATM switching apparatus
1801
is connected to a LAN terminal
1804
through a LAN line
1820
. And a protocol translation for realizing communication between the LAN and the ATM network is performed in the ATM switching apparatus
1801
.
As shown in FIG.
18
(B), the LAN terminal
1804
is provided with a transmission control protocol (TCP) layer, an Internet protocol (IP) layer, and a media access control (MAC) layer. Each of the ATM switching apparatuses
1802
and
1803
is provided with a TCP layer, an IP layer, an AAL layer, and an ATM layer. On the other hand, in order to perform a protocol translation between the LAN and the ATM network, the ATM switching apparatus
1801
is provided with an MAC layer in addition to a TCP layer, an IP layer, an ATM adaptation layer (AAL), and an ATM layer. In FIG.
18
(B), MAC shows a functional block of a physical layer of a LAN interface and ATM shows a functional block for processing the ATM layer of an ATM interface.
As shown in FIG.
18
(B), the ATM switching apparatus
1801
relays transfer of an IP frame to the other ATM switching apparatuses
1802
and
1803
and delivers an IP frame to an application of the ATM switching apparatus
1801
itself. Such relaying and delivering operations are performed by an IP routing part
2034
(see
FIG. 20
) as described later.
FIG. 19
is a block diagram roughly showing a hardware configuration of the ATM switching apparatus
1801
shown in FIGS.
18
(A) and
18
(B).
This ATM switching apparatus
1801
accommodates one or plural ATM terminals (not illustrated), and is connected with other ATM switching apparatuses (not shown in
FIG. 19
) through the ATM lines
1810
, as described above. This ATM switching apparatus
1801
is provided with a control bus
1960
and a LAN controller
1970
in addition to a line card
1910
, an ATM switch
1920
, a segmentation and reassembly sub-layer (SAR)
1930
, a processor bus
1940
, and a central processing unit (CPU)
1950
.
Here, the line card
1910
is provided with plural ATM line packages
1911
(only two ATM line packages are shown in
FIG. 19
for simplifying the description). These ATM line packages
1911
are connected to another ATM switching apparatus or another ATM terminal through an ATM line
1810
, and send and receive ATM cells to and from another ATM switching apparatus or another ATM terminal.
The ATM switch
1920
transfers an ATM cell inputted from an ALP
1911
to another ALP
1911
or transfers an ATM cell between an ALP
1911
and a SAR
1930
on the basis of control of the CPU
1950
.
The SAR
1930
is a circuit for terminating an ATM adaptation layer. That is to say, in case of sending information from an ATM network to a LAN,. it assembles an IP frame from ATM cells inputted from the ATM switch
1920
and sends this IP frame to the CPU
1950
. In case of sending information from a LAN to an ATM network, it disassembles an IP frame inputted from the CPU
1950
into ATM cells and sends these ATM cells to the ATM switch
1920
. This SAR
1930
is provided with a message buffer and a control information buffer.
The CPU
1950
performs the initial setting and status management of each part inside the ATM switching apparatus
1801
and performs a connection setting of the ATM switch
1920
, an AAL control, and the like. Furthermore, the CPU
1950
sends and receives an IP frame to and from the LAN controller
1970
through the control bus
1960
.
The LAN controller
1970
is connected to a LAN terminal
1804
(see
FIGS. 18
) through a port
1820
having an existing LAN interface, and performs information transmission to and reception from the LAN terminal
1804
. Here, an Ethernet interface (Ethernet is a registered trademark), for example, can be used as a LAN interface.
FIG. 20
is a functional block diagram for explaining a communication function of the ATM switching apparatus
1801
. Functional blocks
2010
to
2040
in
FIG. 20
are realized mainly by the software executed by the CPU
1950
.
FIG. 20
shows a case where the TCP/IP protocol is adopted as a LAN protocol in the same way as FIG.
18
.
As shown in
FIG. 20
, the ATM switching apparatus
1801
is provided with a LAN control part
2010
, an AAL part
2020
, an IP part
2030
, and a TCP part
2040
as functional blocks for realizing communication between a LAN terminal and an ATM network. The IP part
2030
is provided with an IP routing part
2031
.
The LAN control part
2010
is a functional block for performing transmission and reception of an IP frame to and from a LAN terminal
1804
(see
FIG. 18
) through the LAN controller
1970
(see FIG.
19
). That is to say, the LAN control part
2010
transfers an IP frame to the IP routing part
2031
when receiving the IP frame outputted by the LAN terminal
1804
from the LAN controller
1970
, and transfers an IP frame to the LAN controller
1970
when receiving the IP frame from the IP routing part
2031
.
The AAL part
2020
is a functional block for controlling a process of ATM adaptation layer. That is to say, the AAL part
2020
controls SAR
1930
(see
FIG. 19
) to disassemble or assemble ATM cells as described above. That is to say, the AAL part
2020
transfers an IP frame to the IP routing part
2031
when receiving the IP frame assembled by SAR
1930
, and controls the SAR
1930
and the ATM switch
1920
to disassemble and transmit an IP frame when receiving from the IP routing part
2031
an instruction of transmitting the IP frame to other ATM switching apparatuses
1802
and
1803
(see FIG.
18
) or another ATM terminal (not illustrated).
The IP routing part
2031
is a functional block which recognizes the destination address of an IP frame received by the LAN terminal control part
2010
or the AAL control part
2020
and performs a routing control according to this recognition result. That is to say, in case that the destination address of an IP frame received by the LAN terminal control part
2010
coincides with the address of the ATM switching apparatus
1802
or
1803
, the IP routing part
2031
starts the AAL control part
2020
and makes it transfer the IP frame to the ATM switching apparatus indicated by the destination address. In case that the destination address of an IP frame received by the AAL control part
2020
coincides with the address of the ATM terminal
1804
, the IP routing part
2031
starts the LAN terminal control part
2010
and sends the IP frame to the LAN terminal
1804
. In case that the destination address of an IP frame received by the LAN terminal control part
2010
or the AAL control part
2020
coincides with the address of the ATM switching apparatus
1801
itself, the IP routing part
2031
transfers the IP frame to the TCP part
2040
through the IP part
2030
. In case that the destination address of an IP frame which th
Fujita Kiyoto
Nakazaki Soko
Burdett James R.
Frank Robert J.
Hsu Alpus H.
Oki Electric Industry Co,. LTD
Qureshi Afsar M.
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