Packet scheduling system

Details Packet scheduling system Packet scheduling system

1997-07-24

2000-04-04

Patel, Ajit

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

370468, 370235, H04L 1256, G08C 1500

Patent

active

060470003

ABSTRACT:
A packet scheduling system is disclosed in which a plurality of first-in-first-out input buffers are provided each corresponding to a respective input data stream to a switching node or multiplexer. Credit is allocated to each stream having packets waiting to be transmitted and which is unable to transmit, and the next stream to be transmitted is based on the allocated credit values, the credit of a transmitted stream being reduced after transmission of a data packet from that stream.

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patent: 5864540 (1999-01-01), Bonomi et al.
Law, Averill M. et al, "Simulation Modeling and Analysis", McGraw-Hill, Inc., Second Edition.

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