Packet reshuffler and method of implementing same

Details Packet reshuffler and method of implementing same Packet reshuffler and method of implementing same

2005-01-21

2008-10-21

Shah, Chirag G (Department: 2619)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S412000

Reexamination Certificate

active

07440454

ABSTRACT:
A packet reshuffler and a method of implementing the same is described. In one example, a digital logic circuit in a transmitter for sending packets stored in a set of buffers includes circular shift register logic, encoder logic, selection logic, and combinatorial logic. The circular shift register logic includes a plurality of registers configured to respectively store a plurality of pointers. Each of the plurality of pointers includes an address of one of the buffers, a priority value, and a type value. The encoder logic is configured to produce a plurality of sets of bits respectively associated with the plurality of pointers. The selection logic is configured to process the plurality of sets of bits to generate a shuffle entry signal associated with a selected one of said plurality of pointers. The combinatorial logic is configured to control the circular shift register logic in response to the shuffle entry signal.

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