Packet processors having comparators therein that determine...

Details Packet processors having comparators therein that determine... Packet processors having comparators therein that determine...

2006-03-30

2010-11-02

Do, Chat C (Department: 2193)

Communications: electrical

Digital comparator systems

C326S104000, C326S112000, C326S119000, C708S200000

Reexamination Certificate

active

07825777

ABSTRACT:
An integrated circuit comparator is provided that determines non-strict inequalities between operands applied thereto. Each comparator includes at least one n-bit comparator cell. This comparator cell is configured to determine a non-strict inequality between a first n-bit operand (e.g., A[n−1, . . . , 0]) and a second n-bit operand (e.g., B[n−1, . . . , 0]). The comparator cell determines the non-strict inequality by computing a control output signal Co(or its complement), where:Co=(…⁡((Ci⁡(A0+B0_)+A0⁢B0_)⁢(A1+B1_)+A1⁢B1_)⁢…⁡(An-2+Bn-2_)+An-2⁢Bn-2_)⁢(An-1+Bn-1_)+An-1⁢Bn-1_,“n” is a positive integer greater than one and Ciis a control input signal that specifies an interpretation to be given to the control output signal Co.

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