Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing
Reexamination Certificate
2000-06-21
2004-02-03
Maung, Zarni (Department: 2154)
Electrical computers and digital processing systems: multicomput
Network-to-computer interfacing
C709S249000
Reexamination Certificate
active
06687757
ABSTRACT:
FIELD OF THE INVENTION
The invention generally relates to broadband communication systems for conveying digital data. More particularly, the invention relates to a programmable, general purpose Packet Processor, which can be used, for example, as a Media Access Control module for modems.
BACKGROUND OF THE INVENTION
The recent development of the Internet, and the development of computer systems directed towards working in wide and global networks have significantly increased the use of modems. Modems for broad band communication are now required to deal with a very high rate of data transfer in a variety of environments.
In the previous decade, modems were mostly used for transferring digital data over a telephone line. In today's communication systems, complex modems are also used for conveying data over other types of mediums, for example, over TV cables, or satellite links. Wireless and/or broad band modems are used, for example, in mobile communications, e.g., for communicating with cells or satellites, etc. Routers, which are widely used in networks, are also an example for such application.
The rapid development of modems for these and other purposes, and the fast and frequent increase in the data transfer rate have increased the necessity to frequently develop and define new standards and protocols for communications. The frequent introduction of new standards, and the increase in the transfer rate have generally required the replacement of older standards, by those compatible with the new standards, as the older modems could not comply with the newer standards, could not adapt to the change in the data transfer rate, or could not be reconfigured.
Generally, any modem comprises two main sections. The first section, the modulator-demodulator section, is a mixed signal section for interfacing between the modem and the medium of transfer, for example, a telephone line, TV cable, or the air, in the case of a wireless modem (hereinafter, when the term “modulator-demodulator” is used, it should be understood to refer to the above-indicated section of the whole apparatus called modem. When the term “modem” is used, it should be understood to refer to the whole apparatus commonly called modem).
The second section of any modem is digital, generally referred to as the Media Access Control (MAC) module. The MAC module operates in the Media Access Control layer. The purpose of the MAC module is to manage and handle the transfer of digital data between the modulator-demodulator section of the modem and a host, in which the higher level layers are implemented, is generally located external to the modem casing, and vice versa.
The MAC module, is the heart of any modem. The MAC module receives a sequence of data stream from a host, creates packets of data that are then transmitted by the modulator, or receives such packets of data from the demodulator and creates a data sequence from them. Of course, these packets also contain additional information which the two communicating modems may need for assuring a reliable communication, i.e., for enabling the recovery of the data at the receiving end. More particularly, the Media Access Control handles error correction, regulates the data flow, handles the handshaking between the two modems, and optionally encrypts or decrypts the transferred data, when necessary, etc. Other functions of the MAC module, when used e.g., in a modem for TV cables are, to carry out the synchronization with the CMTS (Cable Modem Termination System), to manage upstream transmission allocation mechanism, to operate transmission of data on time slot boundaries, and to filter the received headers from the received data. Of course, the MAC module should comply with certain predefined standards, in order to enable the modem to properly communicate both with other modems, and with the host.
Of course, it is essential for the MAC module to handle its tasks in a fast and reliable manner, as the performance of the whole modem greatly depends on the performance of this module. In the existing modems, particularly those working at a very high rate, for example, modems for conveying digital data over TV cables, or those for communicating over fiber-optic links, this is not an easy task, as the amount and rate of the data that the MAC module has to handle are very high.
Efforts have been made to use a processing unit for carrying out many of the tasks of the MAC module, however, with limited success. High speed packet processing poses serious challenges to a single general purpose processor. This is the main reason why many existing modems use hard-wired logic for some of the lower level tasks of the MAC layer, while a high speed processor, if such exists, takes control only at the packet level or IP (Internet Protocol) level. More particularly, in the existing modems the data is processed by a plurality of gates for carrying out the MAC and packet handling tasks. This configuration is rigid, and cannot be changed or reconfigured when a necessity arises.
EP 789,468 discloses an adapter for wireless networks which provides for reconfigurable media access control and data packet formats. However, this adapter is suitable for lower end wireless LAN, and not for high data rate modems, such cable TV or satellite modems.
It is therefore an object of the present invention to provide a Packet Processor for communications applications, particularly for modems, which is capable of handling a high rate of data and performing the above-mentioned tasks in an efficient manner. It is a particular object of the invention to provide a Packet Processor for the broadband and wide band communication schemes, which is capable of implementing functions that must be handled in real time. In one particular case, the Packet Processor is used as a MAC module of a modem.
It is another object of the invention to provide a structure for said Packet Processor, for enabling it to easily adopt new communication standards, and change of data rate, when necessary.
It is still another object of the invention to enable this Packet Processor to communicate with different types of peripherals. In a particular case when the Packet Processor is used as a MAC module for modem, an object of the invention to enable it to communicate with different types of PHY (modulator-demodulator) chips.
It is still another object of the invention to provide said MAC module in a structure which can be easily integrated in a single Very Large Scale Integration (VLSI) chip.
It is still another object of the invention to provide a general-purpose media Packet Processor, which can be used in other communications applications, and for various purposes, due to its programming characteristics.
Other objects and purposes of the invention will become apparent as the description proceeds.
SUMMARY OF THE INVENTION
The Packet Processor of the invention achieves these and other objects by providing to it a new structure.
The present invention relates to a Packet Processor for a communication apparatus, for processing received and transmitted data streams made of packets, each packet mainly comprises a header and a payload section, which comprises,
(A) A receiving part comprising: (a) A receiving PHY interface by which a flow of data stream is conveyed from a Modulator-Demodulator section of a modem to the Packet Processor; (b) A receiving Tubular Bus receiving the said flow of data stream which is conveyed from the Modulator-Demodulator section of the modem to the Packet Processor, said receiving Tubular Bus conveying the data, while processed, in the direction from the said receiving PHY interface to a host interface; (c) At least one processing unit between sections of the said first Tubular Bus for sequentially receiving portions of a data stream from a section of the Tubular Bus processing the same, and outputting the processed data to a next section of the said first Tubular Bus; (d) One FIFO storage unit before and one FIFO storage unit after any of the said processing units on the receiving Tubular Bus, for providing a temporary stor
Ben-Ze'ev Yuval
Kahn Raan
Livshitz Yossi
Mor Yeshayahu
Flextronics Semiconductor Inc.
Friedman Mark M.
Maung Zarni
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