Packet processing system

Details Packet processing system Packet processing system

2008-05-27

2008-05-27

Harper, Kevin C. (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C719S313000, C718S100000

Reexamination Certificate

active

07379460

ABSTRACT:
Some embodiments relate to a processor to provide a plurality of execution threads, a local memory associated with the processor, and a content-addressable memory associated with the processor. An execution thread of the processor may determine an ordering queue, associate a current thread with a last position in the ordering queue, receive a queue release signal from a previous thread in the ordering queue, and execute a critical code segment associated with the ordering queue.

REFERENCES:
patent: 2003/0163589 (2003-08-01), Bunce et al.
patent: 2006/0200825 (2006-09-01), Potter, Jr.
Adiletta, Matthew et al., “The Next Generation of Intel IXP Network Processors”, Intel Technology Journal, vol. 6, Issue 3 (2002); © Intel Corporation. p. 6-18.
Adiletta, Matthew et al., “Packet over SONET: Achieving 10 Gigabit/sec Packet Processing with an IXP2800”, Intel Technology Journal, vol. 6, Issue 3 (2002); © Intel Corporation. p. 29-39.
Feghali, Wajdi et al., “Security: Adding Protection to the Network via the Network Processor”, Intel Technology Journal, vol. 6, Issue 3 (2002); © Intel Corporation. p. 40-49.
Intel White Paper, “Intel® IXP2400 Network Processor: Flexible, High-Performance Solution for Access and Edge Applications”. 10pgs.

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