Packet processing on a multi-core processor

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S230000, C370S235000, C370S389000, C370S412000, C709S211000, C709S212000, C709S232000

Reexamination Certificate

active

07990974

ABSTRACT:
A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.

REFERENCES:
patent: 6675221 (2004-01-01), Basso et al.
patent: 7664823 (2010-02-01), Wakerly
patent: 7702896 (2010-04-01), Polyudov
patent: 2003/0235194 (2003-12-01), Morrison
patent: 2006/0056406 (2006-03-01), Bouchard et al.
patent: 2010/0169636 (2010-07-01), Davis et al.

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