Packet handler

Multiplex communications – Fault recovery – Bypass an inoperative switch or inoperative element of a...

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Details

370220, 370419, H04J1/16;3/14

Patent

active

059035447

ABSTRACT:
A packet handler includes an interface circuit of an ATM handler corresponding in one-to-one relation to each input/output port of an ATM switch. A switch interface including a disconnection circuit and a distribution circuit controls the cell flow from each interface circuit to a corresponding input port and the cell from the output ports of the ATM switch to each interface circuit. In a set of interface circuits, one redundant transmission path can be replaced arbitrarily with two nonredundant independent transmission paths. The ATM communication system can thus accommodate redundant transmission paths and nonredundant transmission paths in an arbitrary ratio.

REFERENCES:
patent: 5069521 (1991-12-01), Hardwick
patent: 5177736 (1993-01-01), Tanabe et al.
patent: 5253247 (1993-10-01), Hirose et al.
patent: 5493566 (1996-02-01), Ljungberg et al.
patent: 5537400 (1996-07-01), Diaz et al.
patent: 5649110 (1997-07-01), Ben-Nun et al.
patent: 5657449 (1997-08-01), Osaki
patent: 5704047 (1997-12-01), Schneeberger

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