Packet framer

Excavating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

371 371, 370 82, 370 941, G06F 1110

Patent

active

055241166

ABSTRACT:
A frame layer communications system for packet-switched virtual circuits that provides error detection when the link layer both corrupts and discards cells. An illustrative embodiment of the invention provides two error detection mechanisms: the first for the user-data and the second for certain control information. When the frame is segmented into cells, the control information and information relating to the second error detection mechanism are segmented into a single cell.

REFERENCES:
patent: 4750109 (1988-06-01), Kita
patent: 4763319 (1988-08-01), Rozenblit
patent: 4852127 (1989-07-01), Fraser et al.
patent: 4975907 (1990-12-01), Dutruel et al.
patent: 5072449 (1991-12-01), Enns et al.
patent: 5128945 (1992-07-01), Enns et al.
patent: 5163054 (1992-11-01), Nagy
patent: 5251215 (1990-10-01), Dradiva et al.
Taka et al. "An FDDI Bridge for the High-Speed Multimedia Backbone LAN" IEEE 1990 pp. 399-404.
J. E. Maxo and B. R. Saltzberg "Error-Burst Detection with Tandem CRC's", IEEE Transactions on Communications, vol. 39, No. 8, Aug. 1991, 1175-1178.
D. E. Comer "Internetworking with TCP/IP", vol. I, Sections 7.3-7.8, 90-100.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Packet framer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Packet framer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Packet framer will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-390848

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.