Packet fastbus

Details Packet fastbus Packet fastbus

1985-07-15

1988-01-12

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 94, H04J 302, H04J 324

Patent

active

047196211

ABSTRACT:
A digital system comprising a synchronous fastbus for interconnecting a cluster of devices such as processors and for interconnecting a plurality of said clusters. Information is transferred over the synchronous fastbus using a parallel digital word information packet. All required bus control signals including acknowledge and non-acknowledge signals take place within the same packet transfer fastbus cycle time. A command information packet is transferred over the fastbus separately from a response information packet thereby leaving the fastbus free until a response packet is returned to the requestor. During the interim other devices are allowed to access the fastbus, thereby increasing significantly fastbus utilization.

REFERENCES:
patent: 4535450 (1985-08-01), Tan
patent: 4568930 (1986-02-01), Livington et al.
patent: 4586175 (1986-04-01), Bedard et al.
Technology Update by Barrie Nicholson, EDN, Feb. 23, 1984, pp. 55-74.
Microsystem Boards, John Javetski, Electronic Products, Jul. 2, 1984, pp. 57-61.

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