Packet communication system

Details Packet communication system Packet communication system

2007-05-01

2007-05-01

Pham, Chi (Department: 2616)

Multiplex communications

Pathfinding or routing

Through a circuit switch

C370S390000, C370S398000, C370S395200, C370S395400, C370S412000, C370S413000, C370S422000, C370S428000

Reexamination Certificate

active

10046304

ABSTRACT:
A Packet communication system has a first line interface; a second line interface that accommodates lines slower than lines accommodated by the first line interface; a crossbar switch; and a scheduler that periodically receives packet output requests from the first and second line interfaces and sends grants based on the requests for the crossbar switch to the first and second line interfaces. The link capacity between the first line interface and the crossbar switch is made higher than that between the second line interface and the crossbar switch, whereby a packet communication system capable of accommodating line interfaces with different speeds efficiently can be provided.

REFERENCES:
patent: 5251206 (1993-10-01), Calvignac et al.
patent: 5550815 (1996-08-01), Cloonan et al.
patent: 5600469 (1997-02-01), Yamazaki
patent: 6185221 (2001-02-01), Aybay
patent: 6661788 (2003-12-01), Angle et al.
McKeown, et al., “Tiny Tera: A Packet Switch Core”, IEEE Micro, Jan./Feb. 1997, pp. 26-33.

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